NAME

tipru — Texas Instruments programmable realtime unit controller

SYNOPSIS

tipru* at omap0

DESCRIPTION

The tipru driver supports the Programmable Realtime Unit and Industrial Communication Subsystem (PRU-ICSS) integrated in Texas Instruments' line of AM335x SoCs. The PRU is a pair of 32-bit modified Harvard architecture processor cores which run a simple RISC instruction set. The PRU forgoes any kind of heuristic caching mechanisms (TLBs, L1/L2/etc caches) as well as instruction pipelining as to allow for completely predictable and deterministic timing behavior. The PRU is clocked at 200MHz and executes one instruction every cycle insofar as it operates within its local data/instruction/shared memory spaces (See CAVEATS for additional details.) tipru's primary interface is through its write-only character device file. Writes to this file populate the PRU's data/instruction/shared memory and must occur at predefined offsets. Further ioctl(2) calls control the PRU's execution.

IOCTLS

The following ioctl(2) commands are supported:

PRUCTRL int *

Start/halt PRU cores. Setting a core's *_SEL bit will change its execution state to whatever the corresponding *_EN bit specifies.

PRUIRQEN int *

Not yet implemented.

PRUIRQBLOCK int *

Not yet implemented.

PRURESET

Halts all PRU cores, zeroes all data/instruction/shared memory, and resets cores' program counters.

FILES

/dev/tipru

Character device for accessing PRU instruction/data space and controlling chip.

ERRORS

[ENODEV]

Character device was opened with mode other than O_WRONLY or a read was attempted.

[EBUSY]

Another process already has an open file descriptor on the character device file.

[ENOTSUPP]

Driver received an unsupported ioctl(2) call.

[EFAULT]

Write attempted at offset not corresponding to top of PRU's data/instruction/shared memory.

[EOVERFLOW]

Write attempted that would overflow targeted memory space.

SEE ALSO

pructl(1), intro(4)

HISTORY

The tipru driver will hopefully soon appear in OpenBSD 6.0.

AUTHORS

The tipru driver was written by Ian Sutton <ian@kremlin.cc>.

CAVEATS

While the PRU has its own data/instruction/shared memory, it is capable of accessing all physical addresses on the system (even its own control registers). Disabling the OCP ports (the mechanism through which the PRU accesses outside$ memory) provides no extra security as the PRU itself can arbitrarily enable it (See BUGS for additional details.) The PRU's runtime characteristics are only deterministic insofar as it accesses memory within its own local address space. All timing guarantees are forfeit once non-local memory is accessed (See AM335x Technical Reference Manual for$ more details.)

BUGS

If the PRU attempts to access memory outside its own local address space, the system will hang unless the OCP master ports are enabled via the SYSCFG register (See AM335x Technical Reference Manual for more details.)